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Altera: Cyclone V DE1-SOC FPGA Development Board - P0159

SKU
MD-00099
PKR164,500.00
Quantity: 0

The DE1-SoC Development Kit presents a robust hardware design platform built around the Altera System-on-Chip (SoC) FPGA, which combines the latest dual-core Cortex-A9 embedded cores with industry-leading programmable logic for ultimate design flexibility

  • Buy 3 for PKR156,275.00 each and save 5%
  • Buy 10 for PKR151,340.00 each and save 8%

The DE1-SoC Development Kit presents a robust hardware design platform built around the Altera System-on-Chip (SoC) FPGA, which combines the latest dual-core Cortex-A9 embedded cores with industry-leading programmable logic for ultimate design flexibility. Users can now leverage the power of tremendous re-configurability paired with a high-performance, low-power processor system. Altera’s SoC integrates an ARM-based hard processor system (HPS) consisting of processor, peripherals and memory interfaces tied seamlessly with the FPGA fabric using a high-bandwidth interconnect backbone. The DE1-SoC development board includes hardware such as high-speed DDR3 memory, video and audio capabilities, Ethernet networking, and much more.

Specifications:



  1. Cyclone V SoC 5CSEMA5F31C6 Device
  2. Dual-core ARM Cortex-A9 (HPS)
  3. 85K Programmable Logic Elements
  4. 4,450 Kbits embedded memory
  5. 6 Fractional PLLs
  6. 2 Hard Memory Controllers
  7. Serial Configuration device – EPCS128 on FPGA
  8. On-Board USB Blaster II (Normal type B USB connector)
  9. 64MB (32Mx16) SDRAM on FPGA
  10. 1GB (2x256Mx16) DDR3 SDRAM on HPS
  11. USB to UART (micro USB type B connector)
  12. 10/100/1000 Ethernet
  13. PS/2 mouse/keyboard
  14. IR Emitter/Receiver
  15. Two 40-pin Expansion Headers (voltage levels: 3.3V)
  16. One 10-pin ADC Input Header
  17. One LTC connector (One Serial Peripheral Interface (SPI) Master ,one I2C and one GPIO interface )
  18. 24-bit VGA DAC
  19. 24-bit CODEC, Line-in, line-out, and microphone-in jacks
  20. TV Decoder (NTSC/PAL/SECAM) and TV-in connector
  21. Fast throughput rate: 1 MSPS
  22. Channel number: 8
  23. Resolution: 12 bits
  24. Analog input range : 0 ~ 2.5 V or 0 ~ 5V as selected via the RANGE bit in the control register
  25. Six 7-segment displays
  26. 10 User switches (FPGA x10)
  27. 4 User Keys (FPGA x4)
  28. G-Sensor on HPS
  29. G-Sensor on HPS

Block Diagram:


Block Diagram

Package Contents: 



  1. DE1-SoC Board
  2. DE1-SoC Quick Start Guide
  3. Type A to B USB Cable
  4. Type A to Mini-B USB Cable
  5. Power DC Adapter (12V)

 
User Manual here
Tutorial
For more






Part Number P0159
Manufacturer TerAsic
Weight (KG) 0.100000
Product Availability In Stock
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